Sample-hold amplifiers are well known in the electronics industry. As the name implies, a sample-hold amplifier has two steady-state operating modes. In the sample-, or track-, mode, the output of an SHA tracks the input as precisely as possible until the hold-mode is initiated. In the hold mode, the output of the SHA retains the value of the input signal at the time the hold-mode was initiated.
Although few circuit components are required for a basic sample-hold amplifier, accurate holding of the sampled input voltage requires a more sophisticated architecture. FIGS. 1, 2, 3 and 4 illustrate some exemplary prior art embodiments of sample-hold amplifiers; many others exist. These exemplary prior art sample-hold circuits employ the technique of auto-zeroing to reduce output errors due to input offsets. In sample-hold applications, auto-zeroing is a method of compensating for errors introduced by the voltage offsets of amplifiers within the circuit. Typically, the offset error of an transconductance amplifier is sampled in the sample-mode of operation. A similar offset value is then added to the output voltage in the hold-mode to negate the offset error. In the prior art circuits listed above, auto-zeroing is used to force the output voltage of the circuit to equal the sampled input voltage. The architecture and performance of these circuits, however, have undesirable drawbacks which limit their utility.
FIG. 1 is a schematic diagram of a simplified auto-zeroing sample-hold amplifier. This sample-hold amplifier requires a high gain/low offset tranconductance amplifier and exhibits poor settling behavior from the return to zero requirement at the circuit output.
FIG. 2 is a schematic diagram of an auto-zeroing sample-hold amplifier which is capable of simultaneous acquisition of an analog signal and storage of a previously sampled signal. This sample-hold amplifier exhibits poor dynamic behavior, requires a high gain/low offset output amplifier and is too complex to be implemented monolithically. Furthermore, the output of the sample-hold amplifier does not track the voltage input.
FIG. 3 is a schematic diagram of a differential switched-capacitor amplifier which contains amplifier offset voltage cancellation. As with the SHA of FIG. 2, this amplifier exhibits poor dynamic behavior, requires a high gain amplifier, and the amplifier output does not track the voltage input.
FIG. 4 is a schematic diagram of an auto-zeroing sample-hold amplifier which exhibits good circuit performance but, as with the SHA of FIG. 2 is unduly complex.
It is therefore an object of the present invention to provide a sample-hold amplifier for use in sampling analog signals, which corrects internal amplifier offset and gain errors, without the need for the amplifier output to return to zero.
Another object of the present invention is to provide a sample-hold amplifier in which the circuit output tracks the voltage input.
A further object of the present invention is to provide a sample-hold amplifier which uses simple low precision amplifiers which do not require high gain or low offsets.
Another object of the present invention is to provide a sample-hold amplifier which has a fast acquisition time.
Yet another object of the present invention is to provide a sample-hold amplifier which has low power consumption and requires little area for integration.
Other objects of the invention will be in part obvious and will in part appear hereinafter.